[2014]Nanotechnology 2014, Volume 25, Issue 50, 505604 (IF = 3.399)

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“Transistor Memory Devices with Large Memory Windows, Using Multi-Stacking of Densely Packed, Hydrophobic Charge Trapping Metal Nanoparticle Array”

Ikjun Cho, Beom Joon Kim, Sook Won Ryu, Jeong Ho Cho* and Jinhan Cho*

* Corresponding Author
These authors equally contributed to this work

Nanotechnology 2014, 25(50) 505604.

DOI: doi.org/10.1088/0957-4484/25/50/505604
ISSN: 0957-4484

Publication Date(Web) : 26 November 2014
Publication Date(Print) : 19 December 2014

Supporting Information

Acknowledgments : This work was supported by National Research Foundation of Korea (NRF) grant funded by the Ministry of Science, ICT & Future Planning (MSIP) (2010-0029106), by Samsung Research Funding Center of Samsung Electronics under Project Number SRFC-MA1301-07, by Basic Science Research Program (2009-0083540) of NRF funded by the Ministry of Education, Science and Technology, Korea, and by the Human Resources Development Program of KETEP grant (NO. 20134010200600) funded by the Korea government Ministry of Trade, Industry and Energy.